Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices has been manufactured having various applicability in numerous disciplines. One such silicon-based semiconductor device is a metal oxide conductor used, for example, in connection with solar cells.
The principal elements of a typical MOS semiconductor device generally include a gate electrode acting as a conductor to which an input signal is applied via gate terminal. Heavily doped source and drain regions are formed in a semiconductor substrate below the gate electrode. These regions are respectively connected to source and drain terminals typically located on either side of the gate electrode. The source and drain regions are separated by a channel region formed in the semiconductor substrate beneath the gate electrode. The channel region is typically lightly doped with a dopant-type that is opposite that of the source and drain regions. The gate electrode is physically separated from the semiconductor substrate by a gate insulating layer. In many instances, the gate insulating layer is an oxide such as silicon dioxide (SiO,). The insulating layer is implemented to impede current flow between the gate electrode and the semiconductor source, drain and or channel regions.
In operation, an output voltage is typically developed between the source and drain terminals. When an input voltage is applied to the gate electrode, a transverse electric field is set up in the channel region. By varying the transverse electric field, it is possible to modulate the conductance of the channel region between the source region and drain region. In this manner an electric field controls the current flow through the channel region. This type of device is commonly referred to as a MOS Field Effect Transistor (MOSFET).
Semiconductor devices, such as the one described above, are used in large numbers in most modern electronic devices. The semiconductor devices such as the one described above are manufactured through a series of steps carried out in a particular order. One important objective in manufacturing such devices is to manufacture devices that conform to the geographical features of the designs for the devices. Such an objective is achieved by closely controlling the manufacturing process to ensure that rigid requirements of, for example, exacting tolerances, quality materials and clean environment are satisfied.
A wide variety of processing techniques may be employed in manufacturing silicon-integrated circuit devices. The formation of these devices generally begins with a silicon wafer having a desired pattern transferred to the surface of the wafer. Often, a layer of silicon dioxide (SiO,) is grown upon the surface of the wafer. Silicon dioxide serves as an insulative material and so is often used to separate various semiconducting layers of integrated circuit devices.
The silicon dioxide is formed on the wafer surface in uniform layers or in particular patterns, as desired. Various techniques such as photolithography, may be employed to achieve the desired wafer surface patterns. In photolithography, a photo-resist material, for example, a photo-sensitive polymer, may be layered atop a generally uniform silicon dioxide layer on a wafer surface. A mask having a desired pattern of clear and opaque areas may then be positioned atop the photo-resist layer. Photo-resist material selectively responds to ultra-violet (UV) light. This selective response characteristic of the photo-resist material results in the formation of particular patterns of photo-resist material atop the silicon dioxide. Once a particular pattern of photo-resist material is formed atop the silicon dioxide of a wafer, portions of the wafer topped by silicon dioxide but not topped by photoresist may then be etched away from the wafer surface. Etching is a common procedure employed in the manufacture of silicon-integrated circuit devices. Generally, the process of etching involves selectively removing portions of a workpiece. The etching process yields for further processing a workpiece having a desired geographical arrangement. After the etch process, the photo-resist material is removed by a subsequent processing step, thereby leaving the silicon wafer topped only by selective configurations of silicon dioxide. While there are a variety of different types of etch processes, an important objective in each such process is the removal of a particular material(s) from the wafer without damaging the wafer.
As previously mentioned, it is important to closely control the various steps used in the manufacturing process. This general rule is specifically applicable to most every etching process. For example, by failing to control the overall duration of the etching process, or by failing to appropriately direct the etching toward certain target portions, the etching process may alter intricately formed portions of the wafer that were not intended to be altered by the etching process. To ensure that the overall duration of the etching process and/or its directivity does not adversely affect the wafer structure, "etch stops" are used to protect those portions of the wafer that are susceptible to such damage. In some applications, the material or materials used as etch stops are removed subsequent to the etching process.
By removing the etch stop after the etching process, the desired geographic configuration at this stage of the chip manufacturing process is realized. If, however, the etch stop is not completely removed, the residual material can adversely affect the performance of the silicon integrated circuit device. For example, silicon nitride, an insulator, has been used as an etch stop. If all the silicon nitride is not removed, then the silicon device being manufactured may be defective under certain conditions or environments due to the residual silicon nitride material providing undesirable resistance between structures intended to be conductively connected.
Designers and manufacturers of silicon integrated circuit devices understand that such circuit imperfections will occur and, for this reason, compensate therefor in the design and manufacturing process. It is, of course, preferable to reduce the likelihood of such imperfections wherever possible. Accordingly, designers and manufacturers of silicon integrated circuit devices continue to search for improved methods and structures to maintain desired wafer geographic configuration and eliminate process impediments such as undesired etch stop residues.